1. Field of the Invention
The invention relates in general to a process for fabricating a semiconductor device, and in particular to a process for making a contact plug in a semiconductor integrated circuit device. More particularly, the invention relates to a process for making a contact plug that is free from the formation of voids inside the plug.
2. Technical Background
As the integration density in semiconductor integrated circuit (IC) devices continues to increase, there has been ever smaller, and frequently insufficient, surface area for fabricating interconnects necessary for the electronic circuits thereof. Techniques for multiple-level metallization have therefore been developed for miniaturized IC designs which are now widely used. Multiple-level metallization techniques are particularly desirable for sophisticated IC devices, high-performance microprocessors for example, in order that interconnections between the complex functional parts can be suitably provided.
Between the multiple levels of metallization implementing the interconnections, contact plugs are used for the communication between the different established levels. Under normal circumstances, an electrically conductive contact plug is fabricated by etching into an insulating layer to form a contact via, which is then filled with electrically conductive material that constitutes the plug. Tungsten is the material most widely used for filling the contact via to make the plug. Tungsten, however, has relatively poor adhesion characteristics with respect to the surrounding insulation material. A lining between the tungsten plug and the surrounding insulating layer must be used to glue (adhere) the two materials together. The lining also serves as a barrier against diffusion of the filled tungsten into the insulating layer. Titanium, titanium nitride (TiN.sub.x), or alloy titanium-tungsten (Ti:W), applied to the sidewall of the contact via by a PVD (physical vapor deposition) or CVD (chemical vapor deposition) procedure, is frequently used as such a lining to provide the necessary adhesion and the diffusion barrier.
A process for fabricating such a conventional contact plug is briefly examined below with reference to FIGS. 1A-1D of the accompanying drawings.
As is shown in FIG. 1A, a contact plug is constructed for an integrated circuit device that may include transistors comprising gate and source/drain regions fabricated over the surface of a silicon substrate 10. The surface of the substrate 10 is covered by an insulating layer 12 which may, for example, be a layer of BPSG (borophosphosilicate glass) or oxide. Designated locations over the surface of the insulating layer 12 are then patterned to form contact vias 13, which reveal regions 10a of the surface of the substrate 10 (only one such region being shown in the figure). This region 10a is the electrically conductive area where the contact plug is to be electrically connected. Formation of the contact via, in general, can be achieved by an anisotropic etching procedure.
Then, as is shown in FIG. 1B, a glue (adhesive) layer 14 can be formed over the side and bottom surfaces of the contact via 13. The surface of the insulating layer 12, proximate to the opening of the contact via may also be covered by this glue layer 14. The glue layer 14 may be applied by for example, a PVD procedure. The material used as the glue layer 14 may be, for example, titanium. Titanium nitride may be additionally used successively to form a composite glue layer comprising the titanium layer and a titanium nitride layer.
As shown in FIG. 1C, the internal space of the opening of the contact via 13 is then filled with an electrically conductive material 16. The conductive material 16 may exceed the internal space of the contact via 13 and cover the surface of the glue layer 14 proximate to the area of the contact via opening. The material 16 may, for example, be tungsten, copper, or aluminum. These electrically conductive materials can be applied to the contact via 13 utilizing a PVD or CVD procedure. Voids such as the void schematically represented by reference numeral 18, are inevitable in some of the contact vias, as a result of poor step coverage when the contact vias are filled with the plug material.
Finally, as is shown in FIG. 1D, a CMP (chemical mechanical polishing) procedure may then be employed to remove the portion of the electrically conductive layer 16 and the glue layer 14 above the surface of the device, until the insulating layer 12 is revealed. At this stage, formation of a conventional contact plug 18a is complete.
In the above-described prior art process for the fabrication of a contact plug, the formation of the glue layer 14 is necessary, especially inside the contact via 13. However, due to the fact that the compactness of the applied glue layer 14 is frequently insufficient, the speed of removal for the conductive material and the glue layer when the CMP procedure is applied is greatly variable. As a result, the polished surface is not sufficiently flat. Therefore, the contact plug does not have a sufficiently flat surface, so that recesses are present. Further, the presence of voids 18 inside the plugs not only increases the electrical resistance of the plugs, but also allows the penetration of slurry via the glue layer to severely affect the characteristics of the fabricated circuit components.